CMOS RF Front-Ends For Bluetooth Applications

This project investigates the design of RF front-ends for bluetooth applications. The main objectives in each design are optimized noise figure, power consumption, gain and linearity. The designed cascode LNA achieves 1.37 dB low noise figure through ports matching and maximizes the voltage gain to 11.5 dB. The port isolation reaches to 82 dB. A 2 MHz low IF down-conversion mixer is developed. It employs current injection to reduce the flicker noise of MOSFETs. The total noise figure of the mixer is 17 dB and input referred IIP3 is 4.97 dB. A quadrature mixer constructed by two symmetric Gilbert mixers are discussed. A common-gate class E power amplifier is investigated. Through connecting a L matching network, the output power would be 17.7 dBm at 1.4 V power supply and the power added efficiency PAE and drain efficiency DE are 41% and 42.8 % respectively. To supply two LO frequencies with 90º phase difference, a quadrature voltage controlled oscillator is designed using a series of coupling structure and accumulation mode PMOS varactors. The frequency tuning range is 2.304 GHz ~ 2.54 GHz when the control voltage changes from 0 to 0.7 V. The QVCO exhibits phase noise of -113 dBc/Hz at 600 kHz offset frequency and -119 dBc.Hz at 1 MHz offset frequency. All the circuits were designed in TSMC-0.18μm 1.8 V CMOS technology and simulated using HSPICE RF simulator.